1. Technical Field
The present application relates to memory devices, and more particularly to memory devices having a three-dimensional array structure and methods of making such devices.
2. Related Art
Memory devices may include memory elements that have two terminals, such as resistive random-access memory (ReRAM). Data may be written in a ReRAM by varying the resistivity levels of the memory elements in the ReRAM. The memory elements may be connected to transistors, such as a bipolar junction transistor (BJT), to allow for changes in the resistivity level of the memory elements.
To provide a ReRAM with high memory density, the memory elements and the transistors may be arranged in stacking array structures. Conventional three-dimensional (3D) array structures may provide a dense 3D array of memory elements and transistors on a limited silicon substrate area. Such conventional 3D array structures are manufactured in a layer-by-layer process, which is also known as a stacking process. The stacking process is expensive and time-consuming, especially with the advanced lithography process involved becoming more costly as manufacturing scales down. As such, a novel 3D array structure that allows for a more cost-effective process for manufacturing high-density memory devices.